Advanced physical verification solutions
PowerDRC/LVS 1.7 released PDF Print E-mail

Santa Clara, USA, July 24, 2013 - POLYTEDA UKRAINE LLC, a provider of semiconductor design software, today announced the general availability of PowerDRC/LVS version 1.7.

This release is dedicated to delivering new functionality:

  • Hierarchical Mode is added in PowerDRC allowing to increase performance dramatically for those chips that have macroblocks
  • PowerRDE is now available for the Windows platform
  • PowerRDE now can be integrated with KLayout viewer and editor to perform DRC run and debug.
  • Some functional enhancements in LVS functionality
  • More convenient XOR
  • Starting from this version you can benefit from using PowerLVS Short Finder that is a GUI application for finding shorted nets quickly

Please review Release Notes for more information. 

PowerDRC/LVS is designed to process integrated circuit (IC) designs of  various size at technology nodes 40nm and below for DRC, and 130nm and above for LVS, with run times which are fast and completely predictable. It is massively scalable and provides turnaround time that is up to an order of magnitude faster than existing solutions. PowerDRC/LVS achieves this scalability and turnaround time through the use of a unique data structure and innovative window scanning technique. 

Foundry Support

During beta test period, POLYTEDA worked with wilde list of partners and evaluators to validate accuracy and performance for production. Contact us to learn more about the availability of foundry rule decks.

Availability and Demonstration

PowerDRC/LVS 1.7  is available now from POLYTEDA. Contact This e-mail address is being protected from spambots. You need JavaScript enabled to view it for more details.


POLYTEDA UKRAINE LLC is a rapidly growing design automation company, focused on providing fast, accurate and affordable verification solutions for electronic design companies. For more information about POLYTEDA and its products, please visit